Semiconductor Wafer Polishing Pad from China
Polyurethane polishing pad engineered for chemical mechanical planarization (CMP) of semiconductor wafers to achieve mirror surface finish. Classified under HTS 8486.90.00.00 as an accessory for wafer polishers in the statistical note.
Duty Rate — China → United States
25%
Rate breakdown
9903.88.0225%Except as provided in headings 9903.88.12, 9903.88.17, 9903.88.20, 9903.88.54, 9903.88.59, 9903.88.61, 9903.88.63, 9903.88.66, 9903.88.67, 9903.88.68, 9903.88.69, or 9903.88.70, articles the product of China, as provided for in U.S. note 20(c) to this subchapter and as provided for in the subheadings enumerated in U.S. note 20(d)
9903.03.030%Articles the product of any country, as provided for in subdivision (aa)(ii) of U.S. note 2 to this subchapter
Import Tips
• Verify pad hardness (40-90 Shore A) and slurry compatibility; require lot traceability for contamination control; avoid reclassification as general polishing under 9601