Compact Semiconductor Wafer Polisher from Japan
Tabletop polisher for final surface finish on silicon wafers via cermet removal. Classified HTS 8461.90.60.50 as low-value wafer polishing machine per statistical note.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.05.4912.5%Section 301 (forced labor) — Japan (col1 rate < 12.5 percent): MFN < 12.5% → total duty capped at 12.5%
Import Tips
• Document polish pad materials and removal rates for semiconductor validation
• Include cleanroom class ratings for import inspection
• Value polishing slurries separately to preserve machine threshold