Photomask Pattern Analyzer from Japan
Automated analyzer that measures critical dimensions and overlay accuracy on photomasks for semiconductor production. It uses interferometry to verify pattern fidelity against design data. HTS 9031.49.70.00 applies for mask inspection in semiconductor device manufacturing.
Duty Rate — Japan → United States
0%
Rate breakdown
9903.05.860%Universal product exemption (U.S. note 52(b))
Import Tips
• Include GDSII data compatibility statements and metrology uncertainty budgets in import docs
• Classify components separately if imported as kits to optimize duties
• Watch for reclassification if software allows non-semiconductor pattern analysis