Semiconductor Wafer Resistivity Mapping System from Japan
Four-point probe system mapping resistivity variation across silicon wafers to monitor doping uniformity in IC fabrication. Generates 2D/3D resistivity maps. Under HTS 9030.82.00.00 for semiconductor wafer checking.
Duty Rate — Japan → United States
0%
Rate breakdown
9903.05.860%Universal product exemption (U.S. note 52(b))
Import Tips
• Specify probe spacing and current injection specs for semiconductor resistivity measurement
• Include doping concentration range documentation for classification
• Avoid general material testing classification by emphasizing wafer mapping function