Silicon Die Spacer Wafer from Japan
Thin silicon wafer with through-holes used as spacers in 3D IC stacking for precise die-to-die alignment. Classified under HTS 8542.90.00.00 as parts of electronic integrated circuits for vertical integration packaging.
Duty Rate — Japan → United States
0%
Rate breakdown
9903.05.860%Articles provided for in subdivision (b) of U.S. note 52 to this subchapter
Import Tips
• Total thickness variation specs; plasma clean certification; handle with wafer shippers