Semiconductor Wafer Polishing Pad from Mexico
Polyurethane polishing pad for chemical mechanical planarization (CMP) of semiconductor wafers to mirror finish. HTS 8487.90.0080 covers it as a consumable part of wafer polishing machinery in semiconductor fabrication. Removes material uniformly for device layer stacking.
Duty Rate — Mexico → United States
13.9%
Rate breakdown
9903.03.0110%Except for products described in headings 9903.03.02–9903.03.11, articles the product of any country, as provided for in subdivision (aa) of U.S. note 2 to this subchapter
Import Tips
• Document slurry compatibility and removal rates specific to silicon wafers
• Include polishing head machine specifications showing pad dimensions/integration