Semiconductor Wafer Polishing Pad from Japan
Polyurethane polishing pad for chemical mechanical planarization (CMP) of semiconductor wafers to mirror finish. HTS 8487.90.0080 covers it as a consumable part of wafer polishing machinery in semiconductor fabrication. Removes material uniformly for device layer stacking.
Duty Rate — Japan → United States
28.9%
Rate breakdown
9903.82.0925%Except as provided for in headings 9903.82.16 and 9903.85.68, articles of copper and derivative aluminum and steel articles, as provided for in subdivisions (c)(vi)–(viii) of U.S. note 16 to this subchapter
9903.03.060%Articles of aluminum, of steel, or of copper or derivative aluminum or steel articles; passenger vehicles (sedans, sport utility vehicles, crossover utility vehicles, minivans, and cargo vans) and light trucks; parts of passenger vehicles (sedans, sport utility vehicles, crossover utility vehicles, minivans, and cargo vans) and light trucks; medium- and heavy-duty vehicles; parts of medium- and heavy-duty vehicles; wood products; and semiconductor articles, of any country, as provided in subdivision (aa)(v) of U.S. note 2 to this subchapter
Import Tips
• Document slurry compatibility and removal rates specific to silicon wafers
• Include polishing head machine specifications showing pad dimensions/integration