Semiconductor Wafer Polishing Pad from China
Polyurethane polishing pad for chemical mechanical planarization (CMP) of semiconductor wafers to mirror finish. HTS 8487.90.0080 covers it as a consumable part of wafer polishing machinery in semiconductor fabrication. Removes material uniformly for device layer stacking.
Duty Rate — China → United States
38.9%
Rate breakdown
9903.03.0110%Except for products described in headings 9903.03.02–9903.03.11, articles the product of any country, as provided for in subdivision (aa) of U.S. note 2 to this subchapter
9903.88.0125%Except as provided in headings 9903.88.05, 9903.88.06, 9903.88.07, 9903.88.08, 9903.88.10, 9903.88.11, 9903.88.14, 9903.88.19, 9903.88.50, 9903.88.52, 9903.88.58, 9903.88.60, 9903.88.62, 9903.88.66, 9903.88.67, 9903.88.68, or 9903.88.69, articles the product of China, as provided for in U.S. note 20(a) to this subchapter and as provided for in the subheadings enumerated in U.S. note 20(b) [to this subchapter]
Import Tips
• Document slurry compatibility and removal rates specific to silicon wafers
• Include polishing head machine specifications showing pad dimensions/integration