Semiconductor Wafer Metrology Tool from Japan
In-line metrology tools measure wafer thickness, overlay, and critical dimensions during device manufacturing for process control. Borderline HTS 8486.20.00.00 if integral to fabrication. Distinguish from pure testing in Chapter 90.
Duty Rate — Japan → United States
0%
Rate breakdown
9903.05.860%Articles provided for in subdivision (b) of U.S. note 52 to this subchapter
Import Tips
• Prove process control vs pure testing function; resolution/throughput specs; integration documentation