Double-Sided Wafer Polisher from Japan
Automated polisher using chemical-mechanical planarization to achieve mirror-finish flatness on both wafer surfaces for semiconductor device fabrication. HTS 8479.89.95.99 for wafer preparation polishers per statistical notes. Removes subsurface damage from lapping.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.03.0110%Except for products described in headings 9903.03.02–9903.03.11, articles the product of any country, as provided for in subdivision (aa) of U.S. note 2 to this subchapter
Import Tips
• Detail polishing pads, slurries, and pressure controls specific to silicon/gallium arsenide
• Include cleanroom class 1 compatibility and deionized water requirements