Wafer Polishing Machine from Japan
Automated polisher that achieves mirror-finish flatness on semiconductor wafers for subsequent fabrication into components of electric lamps and electronic tubes sealed in glass envelopes. HTS 8475.10.00.00 classification reflects its position in the glass envelope assembly workflow.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.05.4912.5%Except for products described in headings 9903.05.85–9903.05.92, articles the product of Japan, with an ad valorem (or ad valorem equivalent) rate of duty under column 1 less than 12.5 percent, as provided for in U.S. note 52 to this subchapter
Import Tips
• Technical specs must demonstrate semiconductor surface prep for glass sealing processes
• Cross-reference chapter statistical notes excluding Chapter 90 testing polishers