Data Acquisition PCA for Wafer Lappers from Japan
Printed circuit assembly for real-time data acquisition from lapping process sensors in semiconductor wafer prep, HTS 8473.50.30.00 due to compatibility with 8471 acquisition systems and 8473 lappers. Maintains critical surface flatness tolerances.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.05.4912.5%Section 301 (forced labor) — Japan (col1 rate < 12.5 percent): MFN < 12.5% → total duty capped at 12.5%
Import Tips
• Provide software/firmware specs showing EDP integration capability
• Use HS explanatory notes to justify multi-machine classification in rulings