Semiconductor Wafer Lapping Jig from Japan
Multi-wafer carrier jig for simultaneous lapping of semiconductor wafers to achieve flatness tolerances critical for device fabrication. Used exclusively with lapping/polishing machines of heading 8460. HTS 8466.20.8040 as specialized work holder for semiconductor processing.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.05.4912.5%Section 301 (forced labor) — Japan (col1 rate < 12.5 percent): MFN < 12.5% → total duty capped at 12.5%
Import Tips
• Specify total thickness variation (TTV) capabilities (<0.1 micron) to prove semiconductor specification
• Include cleanroom class 1 certification for customs cleanroom equipment validation
• Avoid importing with polishing slurries to prevent chemical classification complications