Semiconductor Wafer Polisher from Japan
Automated polisher for final surface finishing of semiconductor wafers to mirror-like flatness required for device fabrication, covered in statistical notes for wafer grinders, lappers, and polishers under HTS 8451.80.00.00.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.05.4912.5%Section 301 (forced labor) — Japan (col1 rate < 12.5 percent): MFN < 12.5% → total duty capped at 12.5%
Import Tips
• Provide CMP (chemical mechanical polishing) process details for accurate heading
• Label as 'semiconductor-specific' to distinguish from textile machinery