Semiconductor Wafer Lapper from Mexico
Semiconductor wafer lappers use abrasive slurries with temperature-controlled slurries to lap both sides of silicon wafers simultaneously, achieving critical flatness for device fabrication. Part of wafer preparation equipment in statistical note (a)(ii)(C). HTS 8419.89.95 covers the temperature-regulated lapping process.
Duty Rate — Mexico → United States
14.2%
Rate breakdown
9903.05.5510%Except for products described in headings 9903.05.85–9903.05.92 and 9903.05.94, articles the product of Mexico, as provided for in U.S. note 52 to this subchapter
Import Tips
• Provide flatness specification data (e.g
• <1μm TTV) proving semiconductor application
• Ensure slurry temperature control documentation to justify 8419 classification