8419.89.95/Semiconductor Wafer Lapper/Japan

Semiconductor Wafer Lapper from Japan

Semiconductor wafer lappers use abrasive slurries with temperature-controlled slurries to lap both sides of silicon wafers simultaneously, achieving critical flatness for device fabrication. Part of wafer preparation equipment in statistical note (a)(ii)(C). HTS 8419.89.95 covers the temperature-regulated lapping process.

Duty Rate — Japan → United States

12.5%

Rate breakdown

9903.05.4912.5%Section 301 (forced labor) — Japan (col1 rate < 12.5 percent): MFN < 12.5% → total duty capped at 12.5%

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Import Tips

• Provide flatness specification data (e.g

• <1μm TTV) proving semiconductor application

• Ensure slurry temperature control documentation to justify 8419 classification