QuickLogic eFPGA IP Core Chip from China
QuickLogic eFPGA provides embeddable FPGA IP blocks with 4.5K to 36K LEs for SoC integration. Qualifies under HTS 8542.31.00.60 as field programmable logic despite IP core format when delivered as configured IC. Enables custom acceleration in customer ASICs.
Duty Rate — China → United States
50%
Rate breakdown
9903.91.0550%Effective with respect to entries on or after January 1, 2025, articles the product of China, as provided for in subdivision (f) of U.S. note 31 to this subchapter
9903.03.030%Articles the product of any country, as provided for in subdivision (aa)(ii) of U.S. note 2 to this subchapter
Import Tips
• IP core FPGAs delivered as ICs need configuration verification proving field programmability
• Distinguish from mask-programmed ASICs via reprogrammability documentation
• Declare target SoC integration specs to prevent semiconductor wafer classification