Electrostatic Wafer Stage from China
Electrostatic stage that grips silicon wafers without physical contact during polishing or grinding in semiconductor equipment under headings 8464-8465. Classified as other work holder in HTS 8466.20.80.65 for principal use in wafer preparation like lapping and polishing. Prevents slip and contamination as noted in statistical definitions.
Duty Rate — China → United States
41.2%
Rate breakdown
9903.88.0125%Except as provided in headings 9903.88.05, 9903.88.06, 9903.88.07, 9903.88.08, 9903.88.10, 9903.88.11, 9903.88.14, 9903.88.19, 9903.88.50, 9903.88.52, 9903.88.58, 9903.88.60, 9903.88.62, 9903.88.66, 9903.88.67, 9903.88.68, or 9903.88.69, articles the product of China, as provided for in U.S. note 20(a) to this subchapter and as provided for in the subheadings enumerated in U.S. note 20(b) [to this subchapter]
9903.05.3112.5%Section 301 (forced labor) — additional 12.5% ad valorem on products of China
Import Tips
• Document voltage ratings and cleanroom certification; ensure declaration specifies semiconductor-only use; test for electrostatic discharge compliance with US standards