Double-Sided Wafer Lapper for Flatness Control from Japan
Laps both sides of semiconductor wafers simultaneously to achieve ultra-flat surfaces required for printing alignment in heading 8442 systems. Ancillary preparation machine per statistical wafer notes. Classified 8443.91.10.00.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.05.4912.5%Section 301 (forced labor) — Japan (col1 rate < 12.5 percent): MFN < 12.5% → total duty capped at 12.5%
Import Tips
• Provide flatness tolerance data (e.g
• <1 micron) proving printing readiness
• Slurry composition docs prevent hazmat flags