Semiconductor Wafer Mass Balance Housing from Japan
Protective housing enclosure for precision balances used in measuring semiconductor wafer mass post-slicing and pre-fabrication. HTS 8423.90.90.00 covers it as other parts ensuring cleanroom stability for weighing operations in wafer prep. Shields against contamination during flatness and tolerance checks.
Duty Rate — Japan → United States
12.5%
Rate breakdown
9903.05.4912.5%Except for products described in headings 9903.05.85–9903.05.92, articles the product of Japan, with an ad valorem (or ad valorem equivalent) rate of duty under column 1 less than 12.5 percent, as provided for in U.S. note 52 to this subchapter
Import Tips
• Certify ISO cleanroom compatibility (Class 1-100) in import docs for semiconductor context
• Pair with balance serial numbers for traceability in customs valuation